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STQ3NK50ZR-AP STD3NK50Z - STD3NK50Z-1
N-CHANNEL 500V - 2.8 - 2.3A TO-92/DPAK/IPAK Zener-Protected SuperMESHTM MOSFET
Table 1: General Features
TYPE STQ3NK50ZR-AP STD3NK50Z STD3NK50Z-1
s s s s s s
Figure 1: Package
RDS(on) 3.3 3.3 3.3 ID 0.5 A 2.3 A 2.3 A Pw 3W 45 W 45 W
VDSS 500 V 500 V 500 V
3 1
TYPICAL RDS(on) = 2.8 EXTREMELY HIGH dv/dt CAPABILITY ESD IMPROVED CAPABILITY) 100% AVALANCHE TESTED NEW HIGH VOLTAGE BENCHMARK GATE CHARGE MINIMIZED
TO-92 (Ammopak)
DPAK
DESCRIPTION The SuperMESHTM series is obtained through an extreme opyimization of ST's well established strip based PowerMESHTM layout. In addition to pushing on-resistance significatly down, special care is taken to ensure a very good dv/dt capability for the most demanding application. Such series complements ST full range of high voltage MOSFETs icluding revolutionary MDmeshTM products APPLICATIONS s AC ADAPTORS AND BATTERY CHARGERS s SWITH MODE POWER SUPPLIES (SMPS) s LIGHTING
3 2 1
IPAK Figure 2: Internal Schematic Diagram
Table 2: Order Coder
SALES TYPE STQ3NK50ZR-AP STD3NK50Z STD3NK50Z-1 MARKING Q3NK50ZR D3NK50Z D3NK50Z PACKAGE TO-92 DPAK IPAK PACKAGING AMMOPAK TAPE & REEL TUBE
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Table 3: Absolute Maximum ratings
Symbol VDS VDGR VGS ID ID IDM ( ) PTOT VESD(G-S) dv/dt (1) Tj Tstg Parameter DPAK/IPAK Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 k) Gate- source Voltage Drain Current (continuous) at TC = 25C Drain Current (continuous) at TC = 100C Drain Current (pulsed) Total Dissipation at TC = 25C Derating Factor Gate source ESD (HBM-C=100 pF, R= 1.5K) Peak Diode Recovery voltage slope Operating Junction Temperature Storage Temperature 2.3 1.45 9.2 45 0.36 2000 4.5 -55 to 150 500 500 30 0.5 0.32 2 3 0.025 Value TO-92 V V V A A A W W/C V V/ns C Unit
( ) Pulse width limited by safe operating area (1) ID 2 di/dt 200A/s, VDD V(BR)DSS
Table 4: Thermal Data
DPAK Rthj-case Rthj-amb Rthj-lead Tl Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max Thermal Resistance Junction-lead Max Maximum Lead Temperature For Soldering Purpose 50 (#) -275 2.77 100 -IPAK TO-92 -120 40 260 Unit C/W C/W C/W C
(#) When mounted on 1inch FR4, 2 Oz copper board.
Table 5: Avalanche Characteristics
Symbol IAR EAS Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Single Pulse Avalanche Energy (starting Tj = 25 C, ID = IAR, VDD = 50 V) Max. Value 2.3 120 Unit A mJ
Table 6: GATE-SOURCE ZENER DIODE
Symbol BVGSO Parameter Gate-Source Breakdown Voltage Test Conditions Igs= 1mA (Open Drain) Min. 30 Typ. Max. Unit V
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES
The built-in-back-to-back Zener diodes have specifically been designed to enchance not only the device's ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device's integrity. These integrated Zener diodes thus avoid the usage of external components.
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ELECTRICAL CHARACTERISTICS (TCASE =25C UNLESS OTHERWISE SPECIFIED) Table 7: On/Off
Symbol V(BR)DSS IDSS IGSS VGS(th) RDS(on) Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Gate Threshold Voltage Static Drain-source On Resistance Test Conditions ID = 1 mA, VGS = 0 VDS = Max Rating VDS = Max Rating, TC = 125 C VGS = 20V VDS = VGS, ID = 50 A VGS = 10V, ID = 1.15 A 3 3.75 2.8 Min. 500 1 50 10 4.5 3.3 Typ. Max. Unit V A A A V
Table 8: Dynamic
Symbol gfs (1) Ciss Coss Crss Coss eq. (3) td(on) tr td(off) tf Qg Qgs Qgd Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Equivalent Output Capacitance Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions VDS = 15 V, ID = 1.15 A VDS = 25V, f = 1 MHz, VGS = 0 Min. Typ. 1.5 280 42 8 27.5 8 13 24 14 11 2.5 5.6 15 Max. Unit S pF pF pF pF ns ns ns ns nC nC nC
VGS = 0V, VDS = 0V to 400 V VDD = 250 V, ID = 1.15 A RG = 4.7 VGS = 10 V (see Figure 19) VDD = 400 V, ID = 2.3 A, VGS = 10V (see Figure 22)
Table 9: Source Drain Diode
Symbol ISD ISDM (2) VSD (1) trr Qrr IRRM trr Qrr IRRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 2.3 A, VGS = 0 ISD =2.3 A, di/dt = 100 A/s VDD = 40V, Tj = 25C (see Figure 20) ISD =2.3A, di/dt = 100 A/s VDD = 40V, Tj = 150C (see Figure 20) 250 745 6 300 960 6.2 Test Conditions Min. Typ. Max. 2.3 9.2 1.6 Unit A A V ns C A ns C A
Note: 1. Pulsed: Pulse duration = 300 s, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. 3. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS.
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Figure 3: Safe Operating Area For TO-92 Figure 6: Thermal Impedance TO-92
Figure 4: Safe Operating Area For DPAK / IPAK
Figure 7: Thermal Impedance For DPAK / IPAK
Figure 5: Output Characteristics
Figure 8: Transfer Characteristics
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Figure 9: Transconductance Figure 12: Capacitance Variations
Figure 10: Gate Charge vs Gate-source Voltage
Figure 13: Normalized Gate Threshold Voltage vs Temperature
Figure 11: Static Drain-Source On Resistance
Figure 14: Source-Drain Forward Characteristics
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Figure 15: Maximum Avalanche Energy vs Temperature Figure 17: Normalized BVDSS vs Temperature
Figure 16: Normalized On Resistance vs Temperature
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Figure 18: Unclamped Inductive Load Test Circuit Figure 21: Unclamped Inductive Wafeform
Figure 19: Switching Times Test Circuit For Resistive Load
Figure 22: Gate Charge Test Circuit
Figure 20: Test Circuit For Inductive Load Switching and Diode Recovery Times
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TO-252 (DPAK) MECHANICAL DATA
mm MIN. A A1 A2 B B2 C C2 D E G H L2 L4 V2 0.60 0o 2.20 0.90 0.03 0.64 5.20 0.45 0.48 6.00 6.40 4.40 9.35 0.8 1.00 8o 0.024 0o TYP. MAX. 2.40 1.10 0.23 0.90 5.40 0.60 0.60 6.20 6.60 4.60 10.10 MIN. 0.087 0.035 0.001 0.025 0.204 0.018 0.019 0.236 0.252 0.173 0.368 0.031 0.039 0o inch TYP. MAX. 0.094 0.043 0.009 0.035 0.213 0.024 0.024 0.244 0.260 0.181 0.398
DIM.
P032P_B
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TO-251 (IPAK) MECHANICAL DATA
DIM. MIN. A A1 A3 B B2 B3 B5 B6 C C2 D E G H L L1 L2 0.45 0.48 6 6.4 4.4 15.9 9 0.8 0.8 0.3 0.95 0.6 0.6 6.2 6.6 4.6 16.3 9.4 1.2 1 0.017 0.019 0.236 0.252 0.173 0.626 0.354 0.031 0.031 2.2 0.9 0.7 0.64 5.2 mm TYP. MAX. 2.4 1.1 1.3 0.9 5.4 0.85 0.012 0.037 0.023 0.023 0.244 0.260 0.181 0.641 0.370 0.047 0.039 MIN. 0.086 0.035 0.027 0.025 0.204 inch TYP. MAX. 0.094 0.043 0.051 0.031 0.212 0.033
H C A C2 L2 D B3 B6 A1 L
= =
3
B5
B
A3
=
B2
=
G
=
E
L1
1
2
=
0068771-E
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TO-92 MECHANICAL DATA
mm. DIM. MIN. A b D E e e1 L R S1 W V 4.32 0.36 4.45 3.30 2.41 1.14 12.70 2.16 0.92 0.41 5 TYP MAX. 4.95 0.51 4.95 3.94 2.67 1.40 15.49 2.41 1.52 0.56 MIN. 0.170 0.014 0.175 0.130 0.094 0.044 0.50 0.085 0.036 0.016 5 TYP. MAX. 0.194 0.020 0.194 0.155 0.105 0.055 0.610 0.094 0.060 0.022 inch
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DPAK FOOTPRINT
TUBE SHIPMENT (no suffix)*
All dimensions are in millimeters
All dimensions are in millimeters
TAPE AND REEL SHIPMENT (suffix "T4")*
REEL MECHANICAL DATA
DIM. A B C D G N T 1.5 12.8 20.2 16.4 50 22.4 18.4 13.2 mm MIN. MAX. 330 0.059 0.504 0.520 0.795 0.645 0.724 1.968 0.881 BULK QTY 2500 inch MIN. MAX. 12.992
TAPE MECHANICAL DATA
DIM. A0 B0 B1 D D1 E F K0 P0 P1 P2 R
W
BASE QTY 2500
mm MIN. 6.8 10.4 1.5 1.5 1.65 7.4 2.55 3.9 7.9 1.9 40
15.7 16.3
inch MIN. MAX. 7 0.267 0.275 0.409 0.417 0.476 0.059 0.063 0.059 0.065 0.073 0.291 0.299 0.100 0.108 0.153 0.161 0.311 0.319 0.075 0.082 1.574
0.618 0.641
MAX. 10.6 12.1 1.6 1.85 7.6 2.75 4.1 8.1 2.1
* on sales type
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TO-92 AMMOPACK
mm. MIN. 4.45 3.30 TYP MAX. 4.95 3.94 1.6 2.3 0.41 12.5 5.65 2.44 -2 17.5 5.7 8.5 18.5 15.5 3.8 16 4 18 6 9 12.7 6.35 2.54 0.56 12.9 7.05 2.94 2 19 6.3 9.25 0.5 20.5 16.5 25 4.2 0.9 11 3 -1 1 0.11 -0.04 0.04 0.15 0.157 0.72 0.61 0.63 0.016 0.49 0.22 0.09 -0.08 0.69 0.22 0.33 0.71 0.23 0.35 0.5 0.25 0.1 MIN. 0.170 0.130 inch TYP. MAX. 0.194 0.155 0.06 0.09 0.022 0.51 0.27 0.11 0.08 0.74 0.24 0.36 0.02 0.80 0.65 0.98 0.16 0.035 0.43
DIM. A1 T T1 T2 d P0 P2 F1, F2 delta H W W0 W1 W2 H H0 H1 D0 t L l1 delta P
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Table 10: Revision History
Date 09-Jul-2004 17-Jan-2005 Revision 1 2 First Release. Complete Version Description of Changes
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners (c) 2005 STMicroelectronics - All Rights Reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America
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